Ol as tingting bilong disain na ol samting bilong makim bilong ol 'Fractional Frequencies' insait long ol 'Crystal Oscillators'
Long disain bilong ol 'hardware clock system', ol enjinia i save bungim ol kain kain 'crystal oscillator' frikwensi we i luk olsem i no stret, olsem 11.0592 MHz, 3.579545 MHz, na 19.6608 MHz. Ol dispela 'frequency' wantaim ol 'decimal components' ol i no makim nating, tasol ol i kamap long ol tingting bilong disain we i kamap long ol 'communication protocols', 'frequency-division constraints', na ol 'system-level reverse requirements'. Stat long ol as tingting, dispela atikol i skelim tingting bilong kamapim ol 'fractional frequency' na i givim ol gutpela rot bilong skelim ol samting bilong makim ol samting.
- As tingting bilong disain bilong ol 'fractional frequency points'
Olsem sistem klok sos, frikwensi seleksen bilong kristal osileta i save stret long inapim stretpela taim rikwaemen bilong ol daunstrim dijitel seket (olsem PLL, divida, na serial komunikesen). Kamap bilong ol 'fractional frequency points' i kamap long dispela 4-pela kain 'design constraints':
1.Adaptim long UART Inteja Divisen long mekim ol asua-fri Serial Baud Reit
Serial baud reit em i kam long sistem klok long inteja divisen, bihainim dispela fomula: Baud reit=Klok frikwensi / Divisen fakta
Long kamapim stret ol standet 'baud rates' (olsem 9600, 19200, o 115200 bps), 'clock frequency' i mas inap long brukim long 'divisor' na i no gat wanpela 'remainder'. Kisim 1.8432 MHz olsem eksampel, bihain long 16-pela taim 'oversampling division':
1.8432 MHz ÷ 16=115.2 kHz, we i wankain olsem 115200 bps.
Wankain olsem, 11.0592 MHz na 19.6608 MHz em 6 taims na 10.666... taims 1.8432 MHz, wanwan (tru tumas, 11.0592=1.8432 × 6, 19.6608=1.8432 × 10.666... i nidim wanpela PLL), tasol long yusim ol stret long klok Ol MCU olsem 51 maikro-kontrola, i larim intanel UART divida long kamapim olgeta standet baud reit long rot bilong divisen. Sapos yu makim wanpela inteja frikwensi bilong 20 MHz, yu no inap long brukim wantaim 115,200, na dispela i save kamapim 'cumulative error' na kamapim ol 'frame error' o 'packet loss'.
2.Sapot bilong wanpela 'binary frequency-division architecture i mekim wok bilong wokim klok diwai i kamap isi
Ol frikwensi olsem 20.48 MHz, 10.24 MHz, na 5.12 MHz olgeta i ken kamap olsem 2ⁿ × 10 kHz (olsem, 20.48 MHz=2048 × 10 kHz). Bihain long ol i putim ol dispela 'frequency' long 'binary frequency division', ol i ken kamapim ol 'sub-clock domains' olsem 10.24 MHz, 5.12 MHz, 2.56 MHz, 1.28 MHz, na ol narapela samting. Dispela rot em i gutpela long yusim ol 'binary counters' o 'shift registers' bilong brukim 'frequency', na dispela i kamapim wanpela 'circuit structure' we i gat gutpela 'fase' rilesensip na i gat wankain taim mak namel long ol kain kain 'frequency{19}}divisen klok. Ol i save yusim ol dispela frikwensi olsem ol bes frikwensi insait long ol indastriel DSP, PLC, na ol servo draiv.
3.Oli wokim long PLL long inapim ol hai-spid komunikesen na odio/vidio sampling standet
Ol SoC bilong nau, ol optikal modul, na ol vidio prosesa i save yusim ol PLL, we i save yusim ol standet inteja frikwensi (olsem 25 MHz o 24 MHz) olsem wanpela refrens na bihain ol i save kamapim ol spesifik non-standet frikwensi long rot bilong inteja divisen o multiplikesen, o fraksenel divisen. Ol eksampel em:
74.25 MHz: Em i 'high-definition video sampling clock we SMPTE standet i makim, we ol i save yusim long ol fomat olsem 1080i na 720p;
33.1776 MHz: Planti taim ol i save painim long ol odio kodek na ol brodben RF fran-end; taim ol i yusim wantaim PLL, em inap long kamapim stret 44.1 kHz o 48 kHz odio sempling reit famili;
25.000625 MHz: Sampela Ethernet PHY i save yusim 25 MHz klok wantaim wanpela 'fractional PLL' long kamapim wanpela stretpela 125 MHz serial data reit long sapotim 1 Gbps lain reit (luksave olsem ol i save yusim ol 'integer multiples' bilong 25 MHz long praktis; dispela em i bilong soim tasol).
Yumi mas luksave olsem 'fractional frequency division' i save kamapim 'deterministic jitter' na 'spurious signals'. Long ol aplikesen we i save pilim nois bilong 'phase', ol i mas givim namba wan luksave long ol 'target frequency' we ol i ken kisim stret long rot bilong 'integer frequency division', o long yusim ol 'low-noise PLLs wantaim ol 'loop bandwidths' we ol i stretim gut.
4.Bihainim ol Historikel Indastri Protokol na EMC Konsideresen
Ol 'Historical Protocols': USB 2.0 i makim wanpela 48 MHz hai-spid klok; Ol Ethernet MAC i save yusim 25 MHz o 125 MHz; na ol 'real-time clocks (RTCs) i wok long 32.768 kHz (215 Hz). Ol i bin stretim ol dispela 'frequency' taim ol i bin kamapim ol 'standard' na bihain ol i bin adoptim long olgeta indastri sen, na kamap olsem ol 'de facto' 'standard'.
Electromagnetic Compatibility (EMC): Ol 'higher-order harmonics bilong ol inteja frikwensi i ken bung wantaim pawa saplai, RF, o ol 'wireless communication bands', na dispela i save kamapim hevi. Sapos yu makim wanpela 'oscillator frequency' wantaim wanpela 'fractional component' dispela inap long rausim o senisim 'harmonic energy', na dispela inap long daunim ol hevi bilong EMI na daunim ol kos bilong 'filtering' na 'shielding'.
- Ol narapela bikpela samting long makim kristal osileta
Antap long 'frequency value', ol dispela samting bilong enjiniaring i bikpela samting tu long makim:
Nois bilong Fes na Jita
Maski ol PLL inap long wokim wanem kain frikwensi, 'fractional frequency division' i save daunim tru 'near phase noise' na 'random jitter'. Long ol aplikesen olsem ol 'high-speed optical modules, millimeter-wave radar, o 5G fronthaul, em i gutpela long makim stret ol 'crystal oscillators' wantaim ol 'native frequency' we i bungim ol 'phase noise specifications' bilong abrusim ol 'insufficient signal integrity margins' bihain.
Lid Taim na Kost
Ol frikwensi we i no standet o kastom i save nidim longpela taim na i save kostim bikpela enjiniaring. Insait long ol mak bilong pefomens we ol i ken orait long en, ol i mas givim namba wan luksave long ol indastri-standet frikwensi (olsem ol komon inteja frikwensi olsem 25 MHz, 27 MHz, 40 MHz, na 50 MHz, na tu ol standet fraksenel frikwensi we mipela i stori long en insait long dispela atikol) long sotim R&D saikel na kontrol kos.
Em inap long wok wantaim ol samting bilong senisim ol samting insait long kantri
Nau yet, ol domestik 'quartz crystal oscillator' manifakta i save karamapim bikpela namba bilong ol 'integer' na 'fractional' standet frikwensi we ol i save yusim planti taim. Taim yu makim wanpela divais, lukluk long saplai stebiliti, ol mak bilong tempereja (olsem ±10 ppm na ±20 ppm), na ol lod kapasitans paramita long mekim em i ken wok wantaim ol klok input rikwaemen bilong host kontrola sip.
- Ol gutpela rekomendesen bilong makim ol samting
Pas,painimaut ol sistem klok tambu: Listim ol stretpela klok frikwensi we olgeta 'peripheral' (UART, I2S, SPI, Ethernet, USB, Video) i nidim na ol 'error margins' bilong ol.
Kisim 'crystal oscillator fundamental frequency' long 'reverse':Sapos 'microcontroller' i gat wanpela 'built-in PLL, makim wanpela 'reference crystal oscillator' we inap long kamapim ol 'target frequency' long rot bilong 'integer' o 'low-fractional division ratios. Givim praioriti long ol frikwensi we divisen resio i liklik long 100 na dinomineta we i gat pawa bilong 2.
Sekim asua bilong divisen: Kalkuletim sapos 'division error' i liklik long 'maximum baud rate/sampling rate deviation' we ol 'peripheral' i larim (planti taim < ±2%).
Skelim hevi bilong EMI:Mekim wanpela 'spectral analysis' bilong ol 'high-frequency harmonics; sapos i gat nid, makim wanpela frikwensi poin we i no wankain olsem ol inteja-oda harmonik.
Tingim ol samting we i stap na pe bilong en: Taim yu inapim ol samting yu laikim, makim wanpela model we i gat planti samting long maket na wanpela kain paket (olsem, HC-49S, SMD 3.2 × 2.5 mm) we i inapim ol samting yu laikim long kamapim.